TSMC taps affiliate Xintec for CoWoS packaging through 2033

Taiwan Semiconductor Manufacturing Company signed a seven-year packaging agreement with affiliate Xintec on Nov. 13, 2026, outsourcing backend assembly to ease capacity shortages for artificial intelligence accelerators.

The agreement runs from Nov. 13, 2026 through Dec. 31, 2033. Under the contract, TSMC will provide cleanroom space inside its facilities at the Central Taiwan Science Park in Taichung, while Xintec installs and runs dedicated production lines.

Xintec approved a NT$15 billion ($456 million) convertible bond issuance on Nov. 13 to finance the initial capital expenditure. The proceeds will fund production equipment and automated material handling systems, which transport wafer carriers across manufacturing bays.

The outsourced work focuses specifically on the on-substrate stage of chip-on-wafer-on-substrate packaging. The architecture integrates graphic processors and high-bandwidth memory chips on a single silicon platform to accelerate data transfer.

Chip-on-wafer-on-substrate packaging consists of two primary operational steps. The first step attaches processed silicon dies onto an intermediate silicon interposer. The second step mounts that combined module onto a multi-layer ball grid array substrate.

TSMC is keeping the front-end die stacking inside its proprietary fabs. Xintec will handle the downstream on-substrate assembly, where completed modules are bonded to circuit boards and sealed for system assembly.

Separating the packaging steps allows TSMC to free cleanroom capacity for lithography and high-density interposer bonding. The split transfers lower-margin, floor-space-intensive substrate assembly to an external partner without relinquishing operational control.

TSMC owns an equity stake of about 41% in Xintec. The packaging house depends on TSMC contract manufacturing for more than 70% of its annual operating revenue.

The corporate tie gives TSMC direct visibility into yield rates and tool utilization. The arrangement functions as an internal joint venture located on TSMC property rather than an arm's-length supply agreement.

Capacity constraints in advanced packaging remain the primary bottleneck restricting shipments of artificial intelligence processors. Leading accelerator designers such as Nvidia have booked large shares of advanced packaging availability through 2027.

Customers building large language models require clusters of processors wired directly to high-bandwidth memory stacks. Conventional assembly techniques cannot provide the microscopic wiring density required to prevent transmission delays between logic and memory dies.

Demand has outpaced available cleanroom footprint across western Taiwan. TSMC has been reallocating existing plant space and purchasing older flat-panel display fabs to convert into packaging lines.

The Xintec partnership mirrors earlier packaging outsourcing programs with outsourced semiconductor assembly and test providers. Companies such as ASE Technology Holding and Amkor Technology have long packaged modules using licenses provided by TSMC.

Those external OSAT vendors run on-substrate lines in their own facilities. By contrast, the Xintec contract embeds the contractor inside TSMC's Taichung fab complex to minimize transit damage and logistics turnaround.

The Taichung site integrates automated overhead hoist transport tracks connecting fab modules. Installing Xintec lines inside the same perimeter eliminates regional road freight between front-end interposer production and backend substrate mounting.

Xintec plans to begin commercial mass production on the new lines in 2029. The multi-year lead time reflects the procurement schedules for specialized thermocompression bonders, underfill dispensers and automated optical inspection equipment.

Capital equipment suppliers must customize tooling to match TSMC's automated defect-tracking protocols. Xintec said engineering teams will collaborate directly with TSMC personnel to guarantee that production lines achieve identical yield benchmarks.

The seven-year framework assures Xintec of stable volume allocation across economic cycles. Long-term off-take commitments protect contract packagers from carrying idle depreciation costs if merchant chip orders fluctuate.

For enterprise customers, the contract establishes an expanded packaging pipeline heading into the next decade. High-performance computing developers have sought multi-year capacity guarantees before committing capital to next-generation silicon tape-outs.

The regulatory filing does not state the targeted monthly wafer processing capacity for the 2029 installation, and TSMC has not issued a stand-alone release on the transaction.

Under the timetable established on Nov. 13, Xintec will proceed with issuing the NT$15 billion in convertible bonds while preparing cleanroom installations ahead of the 2029 manufacturing debut. The operating agreement remains binding through Dec. 31, 2033.