Japan and Vietnam expand chip packaging ties under bilateral pact
Hanoi connects its 50,000-engineer target to Japanese test hubs as Restar agrees to distribute 10 million FPT-designed microchips.
Vietnam and Japan agreed on Nov. 9, 2026 to deepen bilateral semiconductor cooperation, directing Japanese engineering and commercial partnerships toward advanced packaging lines, test facilities and research projects.
The initiative connects Vietnam's goal of training 50,000 chip engineers by 2030 with Japanese efforts to diversify assembly networks away from China. The agreement took form during a bilateral economic forum held in Tokyo.
Under existing commercial frameworks supporting the pact, Restar Corporation agreed to distribute 10 million chips designed by Vietnamese technology company FPT Corporation across the Asia-Pacific market through 2028.
The 10-million-unit distribution pact covers power management chips tailored for office equipment. The initial batch reached Japanese enterprise customers in December 2025 through Restar's distribution channels.
Restar distributes electronic components across Asia and established an engineering unit to support the partnership. FPT aims to build recurring semiconductor revenue in Japan, where power chip demand approaches $3 billion annually.
FPT also started trial operations on Nov. 3, 2026 at its chip testing and packaging plant in Bac Ninh province. The initial site covers 1,600 square meters inside the Yen Phong II-C Industrial Park.
The Bac Ninh testing facility operates six functional lines with a maximum design capacity of 300 million chips per year. FPT plans to invest in conventional and advanced packaging lines during a second phase through 2030, the company said in an operational filing.
Vietnam's Communist Party General Secretary and President To Lam led the delegation in Tokyo. Japanese Prime Minister Sanae Takaichi met with Vietnamese officials to review trade, investment and high-technology supply chains during the four-day visit.
The two governments confirmed backing for five joint semiconductor research projects between Japanese and Vietnamese universities. The research programs address three-dimensional integrated circuits, advanced packaging materials and artificial intelligence hardware.
Funding for the academic projects began under a bilateral grant agreement signed in July 2026. The program includes technical training in Japan for 250 Vietnamese engineers, government officials said.
Japanese chip equipment makers and materials suppliers view Southeast Asia as a critical buffer. Moving assembly lines southward reduces the risk of export restrictions and operational disruption in mainland Chinese factories.
Advanced packaging integrates multiple dies into high-density modules, making back-end assembly essential for high-performance computing. Japanese chemical groups supply the majority of global dielectric films and packaging resins required for these processes.
Vietnam already hosts large multinational assembly facilities that form the foundation for the expansion. Amkor Technology operates a packaging and testing factory in Bac Ninh that represents more than $1.6 billion in capital investment.
Intel Corporation runs a testing and assembly facility in Ho Chi Minh City valued at over $1.5 billion. The plant historically accounted for more than half of the company's global assembly and test volume.
South Korea's Hana Micron also operates packaging lines in Bac Giang province. The company committed more than $1 billion to expand its packaging presence in the country to support regional memory clients.
The arrival of domestic packaging operations from FPT marks a transition from multinational subcontracting to local ownership. Vietnamese officials plan to license at least 10 specialized packaging and testing plants nationwide by 2030.
Securing technical expertise remains the main constraint for Hanoi's semiconductor plan. The country currently has fewer than 10,000 trained chip engineers, leaving a gap of 40,000 technicians required to meet the 2030 national target.
Cooperation with Japanese universities seeks to bridge this gap through joint curriculum design. Japanese institutions provide laboratory equipment and software access, while Vietnamese universities supply engineering graduates for advanced degree programs.
Japanese engineering firms also gain access to lower operating costs in northern Vietnamese industrial zones. Average manufacturing wages in Bac Ninh remain roughly one-third of prevailing factory wages in coastal Chinese technology hubs.
Industrial power reliability presents an operational hurdle for northern Vietnamese facilities. Severe grid shortages disrupted manufacturing hubs in 2023, prompting foreign chip companies to demand dedicated power substations and direct power purchase agreements.
The forum announcements do not state whether Japan's Ministry of Economy, Trade and Industry will commit dedicated subsidies to Vietnamese facilities, and neither government has published a binding bilateral treaty text.
FPT plans to complete validation trials at the Bac Ninh plant and begin commercial packaging services in 2027, ahead of a planned expansion to 6,000 square meters by 2030.
The Ministry of Science and Technology in Hanoi plans to review progress on the five university research programs during the next bilateral committee session in early 2027.
Impact map
How this development propagates across the region and out to global buyers.
| Event | Korea | China | Japan | Global impact |
|---|---|---|---|---|
| bilateral packaging cooperation | Hana Micron faces local competition as domestic Vietnamese testing capacity rises | packaging volumes shift south to bypass potential export controls | Restar expands Asia-Pacific chip distribution with 10 million contracted units | OSAT capacity diversifies as Vietnam targets 10 specialized plants by 2030 |
In this story
- Companies
- FPT CorporationRestar Corporation
- Tickers
- 3156.T
- Exposed
- Amkor TechnologyIntel CorporationHana Micron
- Impact
- Supply ChainCapex
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- South Korea funds advanced chip packaging and backside power pilot lines Also on Hana Micron
- TSMC weighs Texas fab campus to broaden US foundry footprint Also on Intel Corporation
- AMD Reaffirms TSMC Alliance While Evaluating Rival Foundries Also on Intel Corporation
Sources
Primary documents
Reporting
Confidence: high — how we grade this
The documents behind this briefing are linked above. East Asia Brief produces its English text with AI assistance under human editorial review, and does not translate or republish other outlets' articles. See our methodology and AI policy. Spotted an error? Tell us.
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