Rapidus weighs one-year delay to 2nm chip production in Chitose
The foundry reviews shifting commercial runs to fiscal 2028 after prototype setbacks, risking Japan's ¥2 trillion logic manufacturing commitment.
KSBy Kenji Sato, Japan bureau chief··Updated November 10, 2026·4 min read
ShareLinkedInXWhatsAppEmailTechnicians in cleanroom suits examine a control screen on semiconductor manufacturing equipment inside an advanced fabrication facility. (AI-generated image)
Rapidus began reviewing an internal plan on Nov. 11, 2026, to delay mass production of its 2-nanometer logic chips by one year to fiscal 2028 following prototype fabrication setbacks.
The Tokyo-based foundry had targeted the second half of fiscal 2027, ending in March 2028, to initiate commercial runs at its Innovative Integration for Manufacturing (IIM-1) plant in Chitose, Hokkaido.
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Japan bureau chief — Kenji Sato leads Japan coverage, with a focus on the semiconductor equipment and materials suppliers that sit upstream of every fab in the region.
