# SMIC hits record $9.33B revenue as legacy nodes mask 7nm lag *Domestic orders drove fab utilization to 93.7%, shielding fourth-quarter earnings against steep multi-patterning DUV expenses at cutting-edge lines.* **Published:** November 5, 2026 **By:** Wei Zhang **Section:** Semiconductors & AI Hardware — China **Format:** Policy Tracker **Confidence:** medium **Source:** https://eastasiabrief.com/semiconductors/smic-hits-record-9-33b-revenue-legacy-nodes-mask-1155 **Publisher:** East Asia Brief (https://eastasiabrief.com/) --- ## What to know - SMIC relies on 93.7% legacy fab utilization to absorb 40% to 50% cost premiums on 7nm DUV multi-patterning - Huawei and domestic AI developers face 20% to 30% yields on Ascend accelerator wafer allocations - SMIC reports audited full-year financial accounts to the Hong Kong stock exchange on March 27 ![A technician in cleanroom attire handles silicon wafer processing equipment inside a chip manufacturing facility. (AI-generated image)](https://eastasiabrief.com/media/2026-11-05-07ac5c470535.webp) *A technician in cleanroom attire handles silicon wafer processing equipment inside a chip manufacturing facility. (AI-generated image)* Semiconductor Manufacturing International Corporation faced mounting scrutiny over its fabrication bottlenecks on Nov. 5, 2026, as domestic chip orders masked persistent low yields across its 7-nanometer production lines. The Shanghai-based chipmaker closed its latest full financial year with record revenue of $9.33 billion, up 16.2% year-over-year. That top line rested on mature nodes rather than cutting-edge lithography, according to company regulatory filings. SMIC generated $2.49 billion in fourth-quarter revenue while maintaining annual capital expenditures of $8.1 billion. The foundry directed the vast majority of that capital toward capacity expansions at 28-nanometer and older process nodes. Trade restrictions enforced by the United States and the Netherlands bar SMIC from acquiring extreme ultraviolet (EUV) lithography systems from ASML Holding. The Dutch equipment manufacturer also faces licensing curbs on advanced immersion deep ultraviolet (DUV) scanners. SMIC relies on older DUV machines using quadruple patterning — dividing circuit layouts into four separate exposures — to manufacture 7-nanometer and 5-nanometer chips. The multi-exposure technique multiplies mask steps, increasing defect density across production runs. Commercial yields for SMIC's 7-nanometer process node hover between 20% and 30%, industry supply chain data show. Those defect rates push per-wafer manufacturing costs 40% to 50% above equivalent processes run by TSMC. Huawei Technologies absorbs the largest share of SMIC's advanced wafer starts for its Ascend 910 series artificial intelligence processors. Low yields restrict volume shipments, forcing domestic server assemblers to ration delivery allocations across enterprise clients. Baidu and other domestic artificial intelligence developers have redirected accelerator orders to domestic foundries under tightening export controls. SMIC cannot satisfy commercial demand for sub-10-nanometer silicon without accepting severe margin degradation on every wafer processed. In contrast to its cutting-edge challenges, SMIC's mature fabrication facilities operated at 93.7% capacity utilization throughout the year. Chinese fabless designers shifted power management, display driver and microcontroller contracts to local fabs, the company said. Mainland Chinese clients contributed more than 90% of SMIC's total wafer revenues during recent quarters. Beijing's semiconductor self-sufficiency directives accelerated the procurement pivot among automotive, industrial and consumer electronics manufacturers across the domestic market. Total wafer shipments reached 2.87 million eight-inch equivalent units in the most recent operating quarter, company disclosures show. Blended average selling prices gained 5.7% sequentially as customer demand outstripped legacy manufacturing capacity. SMIC's monthly manufacturing capacity climbed past 1.09 million eight-inch equivalent wafers across production clusters in Shanghai, Beijing, Tianjin and Shenzhen. New 12-inch cleanrooms accounted for the entirety of incremental cleanroom additions, according to quarterly reports. Heavy depreciation from new 12-inch fab lines continues to compress operating margins despite high factory throughput. SMIC reported gross margins near 20.4%, down from historical peaks recorded before the current expansion wave began. The foundry integrates etching and deposition equipment from domestic suppliers such as Naura Technology Group and Piotech to replace Western hardware. State-backed developers including SiCarrier collaborate on advanced patterning workarounds to bypass foreign export restrictions. Domestic lithography tools remain years away from commercially matching imported immersion scanners, according to equipment trade group assessments. Chinese toolmakers do not expect to deliver production-ready 7-nanometer immersion lithography systems before 2030. Local chip designers accept higher contract prices and longer delivery lead times to secure sanctioned component supply. Municipal subsidies and domestic sovereign wealth funds offset a portion of the foundry's operational losses on advanced nodes. Taiwan Semiconductor Manufacturing Co. generated more than five times SMIC's total quarterly revenue while operating 7-nanometer and 3-nanometer lines at yields above 80%. That yield advantage preserves Taiwan's lead in high-performance computing hardware. The foundry does not publish official yield rates or production volumes for its sub-10-nanometer lines, and regulatory filings do not substantiate rumors circulating on Nov. 5 of a $9.3 billion quarterly revenue mark. SMIC will present audited full-year financial accounts and capital expenditure plans for its four fab expansion projects to the Hong Kong stock exchange on March 27. Export licences for dual-use semiconductor equipment imported by the foundry remain subject to case-by-case reviews by Dutch and American authorities through the end of the current fiscal year. ## Impact map | Event | Korea | China | Japan | Global impact | | --- | --- | --- | --- | --- | | Chinese foundry bifurcation | Memory makers assess Chinese fab expansions as mature logic lines absorb domestic analog and power orders | SMIC offsets 20% to 30% 7nm yields with 93.7% mature fab utilization and 90.2% domestic customer share | Equipment makers face localized competition as Naura and Piotech capture legacy fab tool market share | AI server supply chains absorb cost premiums as Huawei Ascend shipments face strict wafer allocation limits | ## In this story - **Companies:** Semiconductor Manufacturing International Corporation, Huawei Technologies - **Tickers:** 00981.HK, 688981.SH - **Exposed:** ASML Holding, TSMC, Baidu, Naura Technology Group - **Policy:** Export Controls, Subsidies - **Impact:** Supply Chain, Capex, Pricing ## Primary sources 1. etnet.com.hk 2. jpmwarrants.com.hk 3. kipost.net 4. nvp.co.kr 5. tomshardware.com --- Cite as: East Asia Brief, "SMIC hits record $9.33B revenue as legacy nodes mask 7nm lag," November 5, 2026. https://eastasiabrief.com/semiconductors/smic-hits-record-9-33b-revenue-legacy-nodes-mask-1155