# Nvidia halts H200 chip lines, shifting TSMC output to Rubin *The chip designer took a $0.4 billion charge on excess inventory as export controls squeezed Chinese data center revenue below 1% ahead of Vera Rubin shipments.* **Published:** November 4, 2026 **By:** Mina Okoro **Section:** Semiconductors & AI Hardware — Cross-border **Format:** Company Watch **Confidence:** high **Source:** https://eastasiabrief.com/semiconductors/nvidia-halts-h200-chip-lines-shifting-tsmc-output-rubin-1134 **Publisher:** East Asia Brief (https://eastasiabrief.com/) --- ## What to know - Nvidia halted fresh H200 wafer starts on Nov. 4, 2026 to redirect TSMC capacity to Vera Rubin - China shipments fell below 1% of data center revenue after a $0.4 billion excess inventory charge - Commercial Rubin platform shipments remain scheduled to begin in the second half of fiscal 2027 ![A cleanroom technician operates machinery used to process silicon wafers inside a semiconductor fabrication facility. (AI-generated image)](https://eastasiabrief.com/media/2026-11-04-ea4be92fb1cd.webp) *A cleanroom technician operates machinery used to process silicon wafers inside a semiconductor fabrication facility. (AI-generated image)* Nvidia moved to halt fresh wafer starts for its China-focused H200 accelerator on Nov. 4, 2026, redirecting foundry allocations at Taiwan Semiconductor Manufacturing Co. toward its next-generation Vera Rubin architecture. The reallocation follows a $0.4 billion charge that Nvidia incurred for excess inventory and purchase obligations on H200 chips during the first half of fiscal 2027. Shipments under the export licensing program have dropped below 1% of total data center revenue, the company said in a regulatory filing. The shift frees critical advanced packaging capacity at TSMC, known as Chip on Wafer on Substrate (CoWoS) — a packaging method that connects compute dies and high-bandwidth memory side by side on a thin interposer. Hopper-generation chips like the H200 rely on TSMC's 4-nanometer node and CoWoS-S packaging, whereas the Vera Rubin platform uses a 3-nanometer process paired with CoWoS-L technology. Foundry engineers have begun reassigning cleanroom lines and testing bays in Taiwan to accommodate Rubin's larger physical interposer footprint, supply chain sources said. Nvidia built an estimated buffer of 250,000 H200 processors earlier this year to fulfill pending orders from Chinese customers holding valid procurement letters. Deliveries from that stockpile face friction under rules set by the US Department of Commerce. The export license terms require that each batch of H200 units undergo physical inspection in the United States prior to customer delivery, according to securities disclosures. Those shipments also face a 25% tariff upon entry into the United States for testing, raising procurement overhead for purchasers. At the same time, Chinese authorities have restricted domestic commercial laboratories from deploying foreign processors without individual exemption permits from regulators in Beijing. Chinese cloud operators including ByteDance, Tencent and Alibaba had sought to secure more than 3 million specialized processing units to support foundation model training. With foreign hardware flows constrained, Chinese data center operators are transferring workloads to domestic processors such as Huawei Technologies' Ascend line. Domestic suppliers face their own packaging bottlenecks at Chinese foundries, leaving data centers with an ongoing compute shortfall. The pivot toward Vera Rubin alters procurement allocations across memory suppliers in South Korea. The H200 architecture consumed eight-layer HBM3e modules, whereas the Vera Rubin platform transitions to next-generation HBM4 memory stacks. SK hynix supplies the majority of Nvidia's advanced memory stacks, running its specialized memory packaging lines near full capacity through late 2026. Samsung Electronics completed qualification for its advanced memory modules late last year, capturing a secondary share of Nvidia's upcoming system orders. Global cloud providers have committed multi-gigawatt power capacity to support Vera Rubin deployments across North America and Europe. Oracle Cloud Infrastructure and Microsoft have expanded infrastructure agreements to integrate rack-scale Vera Rubin systems across regional data center clusters. Nvidia designed the Rubin architecture to reduce inference token costs by up to 10 times compared with its Blackwell predecessor, CEO Jensen Huang said in May. Moving foundry allocations from discounted regional accelerators to full-price Rubin systems protects gross margins that exceeded 75% in recent quarters. Nvidia expects commercial shipments of the Vera Rubin platform to begin in the second half of fiscal 2027, according to securities filings. The company scheduled its third-quarter financial results conference call for Nov. 18, 2026, when executives will review data center supply allocations. Nvidia has not published a formal product discontinuation notice for the H200, and TSMC has not disclosed exact wafer line conversion ratios between the two architectures. TSMC continues to expand total CoWoS wafer output toward 1.15 million units annually to support delivery schedules across its customer base. ## Impact map | Event | Korea | China | Japan | Global impact | | --- | --- | --- | --- | --- | | Nvidia reallocates TSMC capacity from H200 to Rubin | SK hynix and Samsung shift HBM supply mix from HBM3e to next-generation HBM4 | Alibaba and Tencent lose fresh H200 supply, relying on a 250,000-unit buffer | Tokyo Electron and Advantest see test equipment orders pivot to 3nm CoWoS-L tooling | Hyperscalers absorb freed advanced packaging slots for second-half fiscal 2027 Rubin delivery | ## In this story - **Companies:** Nvidia, TSMC - **Tickers:** NVDA, 2330.TW - **Exposed:** SK hynix, Samsung Electronics, Alibaba, Tencent, ByteDance - **Policy:** Export Controls, Tariffs - **Impact:** Supply Chain, Capex, Compliance ## Primary sources 1. sec.gov 2. businesspost.co.kr 3. trendforce.com 4. nvidia.com 5. nvp.co.kr --- Cite as: East Asia Brief, "Nvidia halts H200 chip lines, shifting TSMC output to Rubin," November 4, 2026. https://eastasiabrief.com/semiconductors/nvidia-halts-h200-chip-lines-shifting-tsmc-output-rubin-1134