# AMD weighs Samsung foundry alliance to ease reliance on TSMC *Lisa Su said in Seoul that the chipmaker is exploring production with Samsung Electronics, testing a hedge against single-foundry exposure for advanced AI and computing processors.* **Published:** October 7, 2026 **By:** Ji-woo Han **Section:** Semiconductors & AI Hardware — South Korea **Format:** Why It Matters **Confidence:** high **Source:** https://eastasiabrief.com/semiconductors/amd-weighs-samsung-foundry-alliance-ease-reliance-tsmc-573 **Publisher:** East Asia Brief (https://eastasiabrief.com/) --- ## What to know - TSMC manufactures 100% of AMD's sub-7nm chips while AMD explores secondary foundry capacity - Samsung holds preferred supplier status for HBM4 on AMD's Instinct MI455X accelerator - Test silicon evaluations target completion ahead of late 2026 fabrication schedules ![Technicians in protective cleanroom suits inspect semiconductor wafers under microscopes inside an advanced chip manufacturing facility. (AI-generated image)](https://eastasiabrief.com/media/2026-10-07-19b9d03cd050.webp) *Technicians in protective cleanroom suits inspect semiconductor wafers under microscopes inside an advanced chip manufacturing facility. (AI-generated image)* AMD Chief Executive Lisa Su said Oct. 7, 2026, that the American chip designer continues to explore foundry partnership opportunities with Samsung Electronics across advanced logic and memory production. Speaking at a media briefing in Seoul, Su confirmed discussions remain active as customer demand for computing hardware tests fab allocation. TSMC currently manufactures 100% of AMD's sub-7-nanometer microprocessors and graphics chips. AMD reported $34.64 billion in net revenue for 2025, leaning on a single Taiwanese supplier for its flagship data center processors. That concentrated manufacturing footprint leaves the designer vulnerable to rising wafer prices and packaging bottlenecks. TSMC operates its leading-edge lines at near-full capacity, driven by competing allocations from Apple and Nvidia. Tight wafer runs have prompted fabless customers to assess secondary sourcing options across Asia. Samsung operates the only commercial alternative to TSMC in sub-3-nanometer fabrication. The South Korean manufacturer uses Gate-All-Around transistor architecture — a design wrapping gates on four sides of conducting channels to curb electrical leakage. The verbal remarks in Seoul build on a strategic memorandum of understanding signed on March 18, 2026. Executive leadership met at Samsung's Pyeongtaek campus to align future accelerator hardware roadmaps. Under that agreement, Samsung became the preferred supplier of high-bandwidth memory, known as HBM4, for AMD's Instinct MI455X artificial intelligence accelerator. The document explicitly stated both companies would explore opportunities in contract manufacturing. AMD currently uses Samsung foundry lines solely for legacy programmable logic devices, inherited from its Xilinx acquisition. AMD disclosed that limited engagement in its annual Form 10-K filing submitted Feb. 4, 2026. The chip designer repeated that disclosure in its quarterly Form 10-Q filing on Aug. 5, 2026. TSMC handled every commercial run of AMD's high-performance Epyc server chips and Instinct accelerators throughout that period. Splitting volume between two foundries presents operational hurdles for semiconductor designers. Advanced processors require unique physical libraries and photomasks tailored to each fabrication plant's proprietary manufacturing rules. Porting an established microprocessor design between rival foundries can add tens of millions of dollars in non-recurring engineering costs. Designers must also balance volume allocations to preserve volume discounts from their primary manufacturer. Samsung is pitching its turnkey integration model to offset those customer switching costs. The company manufactures logic dies, builds high-bandwidth memory stacks, and packages components together using its proprietary 2.5D packaging technology. That turnkey service eliminates shipping intermediate silicon between separate foundries and packaging vendors in Taiwan. For accelerated computing modules, tighter physical integration directly affects delivery lead times and final module assembly costs. Samsung plans to introduce its 2-nanometer process, designated SF2, featuring backside power delivery networks. The technology routes electrical current from the rear of the silicon wafer to reduce voltage drop and boost operational frequency. Evaluations for high-performance server processors typically begin on multi-project wafers, which combine test dies from several clients on shared tooling. The trial runs let design teams verify power consumption, operating frequency, and transistor defect density. Securing a major tier-one computing client would mark a commercial turning point for Samsung's contract manufacturing division. The South Korean foundry has absorbed persistent operating losses while funding multi-billion-dollar cleanroom expansions in Pyeongtaek and Texas. Gaining even a secondary allocation of server central processing units would lift equipment utilization rates. Higher fab utilization spreads heavy capital depreciation costs across larger volume runs, improving division operating margins. For AMD, qualifying an alternative supplier provides commercial leverage during future wafer price negotiations. TSMC raised advanced process pricing over consecutive quarters, citing elevated electricity tariffs and the capital intensity of overseas expansion. Dual-sourcing also mitigates geographic concentration risk across the Taiwan Strait. Global cloud providers increasingly ask chip designers for business continuity plans that shield server deliveries from regional supply disruptions. The companies have not published any binding commercial supply agreement or wafer volume allocation for Samsung's 2-nanometer or 3-nanometer production lines. Su characterized the ongoing engagement strictly as an exploratory dialogue. Engineering teams from both companies plan to conclude compatibility reviews of test silicon ahead of fabrication schedules targeted for late 2026. Official procurement commitments will depend on whether initial production wafers meet published power benchmarks. ## Impact map | Event | Korea | China | Japan | Global impact | | --- | --- | --- | --- | --- | | AMD foundry diversification | Samsung foundry gains a qualified tier-one test client to lift 2nm fab utilization | no exposure, advanced sub-7nm foundry access restricted by multilateral controls | Tokyo Electron and packaging suppliers capture expanded tool demand across dual supply chains | AMD limits single-source foundry pricing exposure on $34.64 billion computing portfolio | ## In this story - **Companies:** AMD, Samsung Electronics - **Tickers:** AMD, 005930.KS - **Exposed:** TSMC - **Policy:** Economic Security - **Impact:** Supply Chain, Pricing, Capex ## Primary sources 1. amd.com 2. globalbankingandfinance.com 3. wincountry.com 4. newslaw.co.kr 5. heraldcorp.com --- Cite as: East Asia Brief, "AMD weighs Samsung foundry alliance to ease reliance on TSMC," October 7, 2026. https://eastasiabrief.com/semiconductors/amd-weighs-samsung-foundry-alliance-ease-reliance-tsmc-573